lea-dagdag.ll
5.31 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-- -mattr=+slow-3ops-lea | FileCheck %s -check-prefixes=CHECK,SLOW
; RUN: llc < %s -mtriple=x86_64-- -mattr=-slow-3ops-lea | FileCheck %s -check-prefixes=CHECK,FAST
define i16 @and_i8_zext_shl_add_i16(i16 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_zext_shl_add_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leal (%rdi,%rsi,4), %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%t5 = zext i8 %t4 to i16
%sh = shl i16 %t5, 2
%t6 = add i16 %sh, %t0
ret i16 %t6
}
define i16 @and_i8_shl_zext_add_i16(i16 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_shl_zext_add_i16:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andb $8, %sil
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: leal (%rdi,%rax,4), %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%sh = shl i8 %t4, 2
%t5 = zext i8 %sh to i16
%t6 = add i16 %t5, %t0
ret i16 %t6
}
define i32 @and_i8_zext_shl_add_i32(i32 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_zext_shl_add_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leal (%rdi,%rsi,8), %eax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%t5 = zext i8 %t4 to i32
%sh = shl i32 %t5, 3
%t6 = add i32 %sh, %t0
ret i32 %t6
}
define i32 @and_i8_shl_zext_add_i32(i32 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_shl_zext_add_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andb $8, %sil
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: leal (%rdi,%rax,8), %eax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%sh = shl i8 %t4, 3
%t5 = zext i8 %sh to i32
%t6 = add i32 %t5, %t0
ret i32 %t6
}
define i32 @and_i16_zext_shl_add_i32(i32 %t0, i16 %t1) {
; CHECK-LABEL: and_i16_zext_shl_add_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leal (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
%t4 = and i16 %t1, 8
%t5 = zext i16 %t4 to i32
%sh = shl i32 %t5, 2
%t6 = add i32 %sh, %t0
ret i32 %t6
}
define i32 @and_i16_shl_zext_add_i32(i32 %t0, i16 %t1) {
; CHECK-LABEL: and_i16_shl_zext_add_i32:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leal (%rdi,%rsi,4), %eax
; CHECK-NEXT: retq
%t4 = and i16 %t1, 8
%sh = shl i16 %t4, 2
%t5 = zext i16 %sh to i32
%t6 = add i32 %t5, %t0
ret i32 %t6
}
define i64 @and_i8_zext_shl_add_i64(i64 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_zext_shl_add_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leaq (%rdi,%rsi,2), %rax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%t5 = zext i8 %t4 to i64
%sh = shl i64 %t5, 1
%t6 = add i64 %sh, %t0
ret i64 %t6
}
define i64 @and_i8_shl_zext_add_i64(i64 %t0, i8 %t1) {
; CHECK-LABEL: and_i8_shl_zext_add_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: andb $8, %sil
; CHECK-NEXT: movzbl %sil, %eax
; CHECK-NEXT: leaq (%rdi,%rax,2), %rax
; CHECK-NEXT: retq
%t4 = and i8 %t1, 8
%sh = shl i8 %t4, 1
%t5 = zext i8 %sh to i64
%t6 = add i64 %t5, %t0
ret i64 %t6
}
define i64 @and_i32_zext_shl_add_i64(i64 %t0, i32 %t1) {
; CHECK-LABEL: and_i32_zext_shl_add_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leaq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
%t4 = and i32 %t1, 8
%t5 = zext i32 %t4 to i64
%sh = shl i64 %t5, 3
%t6 = add i64 %sh, %t0
ret i64 %t6
}
define i64 @and_i32_shl_zext_add_i64(i64 %t0, i32 %t1) {
; CHECK-LABEL: and_i32_shl_zext_add_i64:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: leaq (%rdi,%rsi,8), %rax
; CHECK-NEXT: retq
%t4 = and i32 %t1, 8
%sh = shl i32 %t4, 3
%t5 = zext i32 %sh to i64
%t6 = add i64 %t5, %t0
ret i64 %t6
}
; Negative test - shift can't be converted to scale factor.
define i64 @and_i32_zext_shl_add_i64_overshift(i64 %t0, i32 %t1) {
; CHECK-LABEL: and_i32_zext_shl_add_i64_overshift:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: shlq $4, %rsi
; CHECK-NEXT: leaq (%rsi,%rdi), %rax
; CHECK-NEXT: retq
%t4 = and i32 %t1, 8
%t5 = zext i32 %t4 to i64
%sh = shl i64 %t5, 4
%t6 = add i64 %sh, %t0
ret i64 %t6
}
define i64 @and_i32_shl_zext_add_i64_overshift(i64 %t0, i32 %t1) {
; CHECK-LABEL: and_i32_shl_zext_add_i64_overshift:
; CHECK: # %bb.0:
; CHECK-NEXT: # kill: def $esi killed $esi def $rsi
; CHECK-NEXT: andl $8, %esi
; CHECK-NEXT: shll $4, %esi
; CHECK-NEXT: leaq (%rsi,%rdi), %rax
; CHECK-NEXT: retq
%t4 = and i32 %t1, 8
%sh = shl i32 %t4, 4
%t5 = zext i32 %sh to i64
%t6 = add i64 %t5, %t0
ret i64 %t6
}