inline-asm-avx512f-v-constraint.ll
2.8 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
; RUN: llc < %s -mtriple x86_64-unknown-linux-gnu -mattr +avx512f | FileCheck %s
define <16 x float> @testzmm_1(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpternlogd $0, %zmm1, %zmm0, %zmm0
%0 = tail call <16 x float> asm "vpternlogd $$0, $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm0)
ret <16 x float> %0
}
define <16 x float> @testzmm_2(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpabsq %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpabsq $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_3(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpaddd %zmm1, %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpaddd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_4(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpaddq %zmm1, %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpaddq $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_5(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpandd %zmm1, %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpandd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_6(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpandnd %zmm1, %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpandnd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_7(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vpmaxsd %zmm1, %zmm1, %zmm0
%0 = tail call <16 x float> asm "vpmaxsd $1, $2, $0", "=v,v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1, <16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_8(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vmovups %zmm1, %zmm0
%0 = tail call <16 x float> asm "vmovups $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testzmm_9(<16 x float> %_zmm0, <16 x float> %_zmm1) {
entry:
; CHECK: vmovupd %zmm1, %zmm0
%0 = tail call <16 x float> asm "vmovupd $1, $0", "=v,v,~{dirflag},~{fpsr},~{flags}"(<16 x float> %_zmm1)
ret <16 x float> %0
}
define <16 x float> @testZMM0() {
entry:
; CHECK: vpternlogd $255, %zmm0, %zmm0, %zmm0
%zmm0 = alloca <16 x float>, align 64
%0 = call <16 x float> asm "vpternlogd $$255, $0, $0, $0", "=^Yz,~{dirflag},~{fpsr},~{flags}"()
store <16 x float> %0, <16 x float>* %zmm0, align 64
%1 = load <16 x float>, <16 x float>* %zmm0, align 64
ret <16 x float> %1
}