nofpexcept.ll
2.28 KB
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; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s \
; RUN: -stop-after=finalize-isel -verify-machineinstrs | FileCheck %s
; Verify if the mayRaiseFPException is set for FCMPD/FCMPS
define i32 @fcmpu(double %a, double %b) {
; CHECK-LABEL: name: fcmpu
; CHECK: bb.0.entry:
; CHECK: liveins: $f1, $f2
; CHECK: [[COPY:%[0-9]+]]:f8rc = COPY $f2
; CHECK: [[COPY1:%[0-9]+]]:f8rc = COPY $f1
; CHECK: %2:crrc = nofpexcept FCMPUD [[COPY1]], [[COPY]]
; CHECK: [[COPY2:%[0-9]+]]:crbitrc = COPY %2.sub_gt
; CHECK: [[LI8_:%[0-9]+]]:g8rc_and_g8rc_nox0 = LI8 0
; CHECK: [[LI8_1:%[0-9]+]]:g8rc_and_g8rc_nox0 = LI8 1
; CHECK: [[ISEL8_:%[0-9]+]]:g8rc = ISEL8 [[LI8_1]], [[LI8_]], [[COPY2]]
; CHECK: $x3 = COPY [[ISEL8_]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $x3
entry:
%r = fcmp ogt double %a, %b
%g = zext i1 %r to i32
ret i32 %g
}
define double @max_typec(double %a, double %b) {
; CHECK-LABEL: name: max_typec
; CHECK: bb.0.entry:
; CHECK: liveins: $f1, $f2
; CHECK: [[COPY:%[0-9]+]]:vsfrc = COPY $f2
; CHECK: [[COPY1:%[0-9]+]]:vsfrc = COPY $f1
; CHECK: %2:vsfrc = nofpexcept XSMAXCDP [[COPY1]], [[COPY]]
; CHECK: $f1 = COPY %2
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
entry:
%cmp = fcmp ogt double %a, %b
%sel = select i1 %cmp, double %a, double %b
ret double %sel
}
; Verify no mayRaiseFPException bit set on fneg & fabs
define double @fneg(double %a) {
; CHECK-LABEL: name: fneg
; CHECK: bb.0.entry:
; CHECK: liveins: $f1
; CHECK: [[COPY:%[0-9]+]]:vsfrc = COPY $f1
; CHECK: [[XSNEGDP:%[0-9]+]]:vsfrc = XSNEGDP [[COPY]], implicit $rm
; CHECK: $f1 = COPY [[XSNEGDP]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
entry:
%neg = fneg double %a
ret double %neg
}
define double @fabs(double %a) {
; CHECK-LABEL: name: fabs
; CHECK: bb.0.entry:
; CHECK: liveins: $f1
; CHECK: [[COPY:%[0-9]+]]:vsfrc = COPY $f1
; CHECK: [[XSABSDP:%[0-9]+]]:vsfrc = XSABSDP [[COPY]], implicit $rm
; CHECK: $f1 = COPY [[XSABSDP]]
; CHECK: BLR8 implicit $lr8, implicit $rm, implicit $f1
entry:
%abs = call double @llvm.fabs.f64(double %a)
ret double %abs
}
declare double @llvm.fabs.f64(double)