load_4_unaligned.mir
3.55 KB
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R6
--- |
@float_align1 = common global float 0.000000e+00, align 1
@float_align4 = common global float 0.000000e+00, align 4
@i32_align8 = common global i32 0, align 8
define float @load_float_align1() {
entry:
%0 = load float, float* @float_align1, align 1
ret float %0
}
define float @load_float_align4() {
entry:
%0 = load float, float* @float_align4, align 4
ret float %0
}
define i32 @load_i32_align8() {
entry:
%0 = load i32, i32* @i32_align8, align 8
ret i32 %0
}
...
---
name: load_float_align1
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: load_float_align1
; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align1
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align1, align 1)
; MIPS32: $f0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $f0
; MIPS32R6-LABEL: name: load_float_align1
; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align1
; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align1, align 1)
; MIPS32R6: $f0 = COPY [[LOAD]](s32)
; MIPS32R6: RetRA implicit $f0
%1:_(p0) = G_GLOBAL_VALUE @float_align1
%0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @float_align1, align 1)
$f0 = COPY %0(s32)
RetRA implicit $f0
...
---
name: load_float_align4
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: load_float_align4
; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align4
; MIPS32: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align4)
; MIPS32: $f0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $f0
; MIPS32R6-LABEL: name: load_float_align4
; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @float_align4
; MIPS32R6: [[LOAD:%[0-9]+]]:fprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @float_align4)
; MIPS32R6: $f0 = COPY [[LOAD]](s32)
; MIPS32R6: RetRA implicit $f0
%1:_(p0) = G_GLOBAL_VALUE @float_align4
%0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @float_align4)
$f0 = COPY %0(s32)
RetRA implicit $f0
...
---
name: load_i32_align8
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
; MIPS32-LABEL: name: load_i32_align8
; MIPS32: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @i32_align8
; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @i32_align8, align 8)
; MIPS32: $v0 = COPY [[LOAD]](s32)
; MIPS32: RetRA implicit $v0
; MIPS32R6-LABEL: name: load_i32_align8
; MIPS32R6: [[GV:%[0-9]+]]:gprb(p0) = G_GLOBAL_VALUE @i32_align8
; MIPS32R6: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[GV]](p0) :: (dereferenceable load 4 from @i32_align8, align 8)
; MIPS32R6: $v0 = COPY [[LOAD]](s32)
; MIPS32R6: RetRA implicit $v0
%1:_(p0) = G_GLOBAL_VALUE @i32_align8
%0:_(s32) = G_LOAD %1(p0) :: (dereferenceable load 4 from @i32_align8, align 8)
$v0 = COPY %0(s32)
RetRA implicit $v0
...