float_arithmetic_operations.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @float_add() {entry: ret void}
define void @float_sub() {entry: ret void}
define void @float_mul() {entry: ret void}
define void @float_div() {entry: ret void}
define void @double_add() {entry: ret void}
define void @double_sub() {entry: ret void}
define void @double_mul() {entry: ret void}
define void @double_div() {entry: ret void}
...
---
name: float_add
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: float_add
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP32: [[FADD:%[0-9]+]]:fprb(s32) = G_FADD [[COPY]], [[COPY1]]
; FP32: $f0 = COPY [[FADD]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_add
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP64: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP64: [[FADD:%[0-9]+]]:fprb(s32) = G_FADD [[COPY]], [[COPY1]]
; FP64: $f0 = COPY [[FADD]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = COPY $f14
%2:_(s32) = G_FADD %0, %1
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: float_sub
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: float_sub
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP32: [[FSUB:%[0-9]+]]:fprb(s32) = G_FSUB [[COPY]], [[COPY1]]
; FP32: $f0 = COPY [[FSUB]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_sub
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP64: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP64: [[FSUB:%[0-9]+]]:fprb(s32) = G_FSUB [[COPY]], [[COPY1]]
; FP64: $f0 = COPY [[FSUB]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = COPY $f14
%2:_(s32) = G_FSUB %0, %1
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: float_mul
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: float_mul
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP32: [[FMUL:%[0-9]+]]:fprb(s32) = G_FMUL [[COPY]], [[COPY1]]
; FP32: $f0 = COPY [[FMUL]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_mul
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP64: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP64: [[FMUL:%[0-9]+]]:fprb(s32) = G_FMUL [[COPY]], [[COPY1]]
; FP64: $f0 = COPY [[FMUL]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = COPY $f14
%2:_(s32) = G_FMUL %0, %1
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: float_div
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: float_div
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP32: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP32: [[FDIV:%[0-9]+]]:fprb(s32) = G_FDIV [[COPY]], [[COPY1]]
; FP32: $f0 = COPY [[FDIV]](s32)
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_div
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fprb(s32) = COPY $f12
; FP64: [[COPY1:%[0-9]+]]:fprb(s32) = COPY $f14
; FP64: [[FDIV:%[0-9]+]]:fprb(s32) = G_FDIV [[COPY]], [[COPY1]]
; FP64: $f0 = COPY [[FDIV]](s32)
; FP64: RetRA implicit $f0
%0:_(s32) = COPY $f12
%1:_(s32) = COPY $f14
%2:_(s32) = G_FDIV %0, %1
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: double_add
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: double_add
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP32: [[FADD:%[0-9]+]]:fprb(s64) = G_FADD [[COPY]], [[COPY1]]
; FP32: $d0 = COPY [[FADD]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_add
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP64: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP64: [[FADD:%[0-9]+]]:fprb(s64) = G_FADD [[COPY]], [[COPY1]]
; FP64: $d0 = COPY [[FADD]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = COPY $d7
%2:_(s64) = G_FADD %0, %1
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: double_sub
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: double_sub
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP32: [[FSUB:%[0-9]+]]:fprb(s64) = G_FSUB [[COPY]], [[COPY1]]
; FP32: $d0 = COPY [[FSUB]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_sub
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP64: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP64: [[FSUB:%[0-9]+]]:fprb(s64) = G_FSUB [[COPY]], [[COPY1]]
; FP64: $d0 = COPY [[FSUB]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = COPY $d7
%2:_(s64) = G_FSUB %0, %1
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: double_mul
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: double_mul
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP32: [[FMUL:%[0-9]+]]:fprb(s64) = G_FMUL [[COPY]], [[COPY1]]
; FP32: $d0 = COPY [[FMUL]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_mul
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP64: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP64: [[FMUL:%[0-9]+]]:fprb(s64) = G_FMUL [[COPY]], [[COPY1]]
; FP64: $d0 = COPY [[FMUL]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = COPY $d7
%2:_(s64) = G_FMUL %0, %1
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: double_div
alignment: 4
legalized: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: double_div
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP32: [[FDIV:%[0-9]+]]:fprb(s64) = G_FDIV [[COPY]], [[COPY1]]
; FP32: $d0 = COPY [[FDIV]](s64)
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_div
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6
; FP64: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7
; FP64: [[FDIV:%[0-9]+]]:fprb(s64) = G_FDIV [[COPY]], [[COPY1]]
; FP64: $d0 = COPY [[FDIV]](s64)
; FP64: RetRA implicit $d0
%0:_(s64) = COPY $d6
%1:_(s64) = COPY $d7
%2:_(s64) = G_FDIV %0, %1
$d0 = COPY %2(s64)
RetRA implicit $d0
...