peephole-cmp.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple thumbv8m.base-none-eabi -run-pass=peephole-opt -verify-machineinstrs -o - %s | FileCheck %s
--- |
target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "thumbv8m.base-none-none-eabi"
define i32 @test_subrr(i32 %a, i32 %b) { ret i32 %a }
define i32 @test_subrr_c(i32 %a, i32 %b) { ret i32 %a }
define i32 @test_subri3(i32 %a) { ret i32 %a }
define i32 @test_subri8(i32 %a) { ret i32 %a }
define i32 @test_addrr(i32 %a) { ret i32 %a }
define i32 @test_addri3(i32 %a) { ret i32 %a }
define i32 @test_addri8(i32 %a) { ret i32 %a }
...
---
name: test_subrr
liveins:
- { reg: '$r0', virtual-reg: '%1' }
- { reg: '$r1', virtual-reg: '%2' }
body: |
; CHECK-LABEL: name: test_subrr
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 8 /* CC::hi */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %3
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0, $r1
%2:tgpr = COPY $r1
%1:tgpr = COPY $r0
%0:tgpr, $cpsr = tSUBrr %2, %1, 14, $noreg
tCMPr %1, %2, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %3
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_subrr_c
liveins:
- { reg: '$r0', virtual-reg: '%1' }
- { reg: '$r1', virtual-reg: '%2' }
body: |
; CHECK-LABEL: name: test_subrr_c
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %2:tgpr, $cpsr = tSUBrr [[COPY1]], [[COPY]], 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %3
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0, $r1
%2:tgpr = COPY $r1
%1:tgpr = COPY $r0
%0:tgpr, $cpsr = tSUBrr %1, %2, 14, $noreg
tCMPr %1, %2, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %3
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_subri3
liveins:
- { reg: '$r0', virtual-reg: '%1' }
body: |
; CHECK-LABEL: name: test_subri3
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %1:tgpr, $cpsr = tSUBi3 [[COPY]], 1, 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY %1
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0
%1:tgpr = COPY $r0
%0:tgpr, $cpsr = tSUBi3 %1, 1, 14, $noreg
tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %2
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_subri8
liveins:
- { reg: '$r0', virtual-reg: '%1' }
body: |
; CHECK-LABEL: name: test_subri8
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %1:tgpr, $cpsr = tSUBi8 [[COPY]], 1, 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 3 /* CC::lo */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY %1
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0
%1:tgpr = COPY $r0
%0:tgpr, $cpsr = tSUBi8 %1, 1, 14, $noreg
tCMPi8 %1, 1, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %2
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_addrr
liveins:
- { reg: '$r0', virtual-reg: '%1' }
- { reg: '$r1', virtual-reg: '%2' }
body: |
; CHECK-LABEL: name: test_addrr
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r1
; CHECK: [[COPY1:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %2:tgpr, $cpsr = tADDrr [[COPY]], [[COPY1]], 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %3:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %3
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0, $r1
%2:tgpr = COPY $r1
%1:tgpr = COPY $r0
%0:tgpr, $cpsr = tADDrr %2, %1, 14, $noreg
tCMPr %0, %2, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%3:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %3
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_addri3
liveins:
- { reg: '$r0', virtual-reg: '%1' }
body: |
; CHECK-LABEL: name: test_addri3
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %0:tgpr, $cpsr = tADDi3 [[COPY]], 1, 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY [[COPY]]
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0
%0:tgpr = COPY $r0
%1:tgpr, $cpsr = tADDi3 %0, 1, 14, $noreg
tCMPr %1, %0, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %2
tBX_RET 14, $noreg, implicit $r0
...
---
name: test_addri8
liveins:
- { reg: '$r0', virtual-reg: '%1' }
body: |
; CHECK-LABEL: name: test_addri8
; CHECK: bb.0:
; CHECK: successors: %bb.2(0x40000000), %bb.1(0x40000000)
; CHECK: [[COPY:%[0-9]+]]:tgpr = COPY $r0
; CHECK: %0:tgpr, $cpsr = tADDi8 [[COPY]], 10, 14 /* CC::al */, $noreg
; CHECK: tBcc %bb.2, 2 /* CC::hs */, $cpsr
; CHECK: tB %bb.1, 14 /* CC::al */, $noreg
; CHECK: bb.1:
; CHECK: $r0 = COPY [[COPY]]
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
; CHECK: bb.2:
; CHECK: %2:tgpr, dead $cpsr = tMOVi8 0, 14 /* CC::al */, $noreg
; CHECK: $r0 = COPY %2
; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
bb.0:
successors: %bb.2(0x40000000), %bb.1(0x40000000)
liveins: $r0
%0:tgpr = COPY $r0
%1:tgpr, $cpsr = tADDi8 %0, 10, 14, $noreg
tCMPr %1, %0, 14, $noreg, implicit-def $cpsr
tBcc %bb.2, 3, $cpsr
tB %bb.1, 14, $noreg
bb.1:
$r0 = COPY %0
tBX_RET 14, $noreg, implicit $r0
bb.2:
%2:tgpr, dead $cpsr = tMOVi8 0, 14, $noreg
$r0 = COPY %2
tBX_RET 14, $noreg, implicit $r0
...