InstructionMemory.v
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module InstructionMemory(address, instruction);
input[31:0] address;
output reg[31:0] instruction;
reg[31:0] instr_mem[127:0];
// Factorial #1
initial begin
instr_mem[0] = 32'b00100000000100000000000000000001; // addi, $0, $s0($16), +1
instr_mem[1] = 32'b00100000000010000000000000001010; // addi, $0, $t0($8), +10
instr_mem[2] = 32'b00100001001010010000000000000001; // addi, $t1($9), $t1($9), +1
instr_mem[3] = 32'b00000010000010010000000000011000; // mult, $s0($16), $t1($9)
instr_mem[4] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[5] = 32'b00010101000010011111111111111100; // bne, $t0($8), $t1($9), -4
instr_mem[6] = 32'b00100010000000100000000000000000; // addi, $s0($16), $v0($2), +0
end
/*
// Factorial #2
initial begin
instr_mem[0] = 32'b00100000000100000000000000000001; // addi, $0, $s0($16), +1
instr_mem[1] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[2] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[3] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[4] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[5] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[6] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[7] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[8] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[9] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[10] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[11] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[12] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[13] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[14] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[15] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[16] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[17] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[18] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[19] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[20] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[21] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[22] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[23] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[24] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[25] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[26] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[27] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[28] = 32'b00100001000010000000000000000001; // addi, $t0($8), $t0($8), +1
instr_mem[29] = 32'b00000010000010000000000000011000; // mult, $s0($16), $t0($8)
instr_mem[30] = 32'b00000000000000001000000000010010; // mflo, $s0($16)
instr_mem[31] = 32'b00100010000000100000000000000000; // addi, $s0($16), $v0($2), +0
end
*/
always @ (*) begin
instruction = instr_mem[address/4];
end
endmodule