strided-load-i32.ll
3.66 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -lower-matrix-intrinsics -S < %s | FileCheck %s
; RUN: opt -passes='lower-matrix-intrinsics' -S < %s | FileCheck %s
define <9 x i32> @strided_load_3x3(<9 x i32>* %in, i32 %stride) {
; CHECK-LABEL: @strided_load_3x3(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x i32>* [[IN:%.*]] to i32*
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <3 x i32>*
; CHECK-NEXT: [[TMP4:%.*]] = load <3 x i32>, <3 x i32>* [[TMP3]], align 4
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP5]]
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <3 x i32>*
; CHECK-NEXT: [[TMP8:%.*]] = load <3 x i32>, <3 x i32>* [[TMP7]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = mul i32 2, [[STRIDE]]
; CHECK-NEXT: [[TMP10:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP9]]
; CHECK-NEXT: [[TMP11:%.*]] = bitcast i32* [[TMP10]] to <3 x i32>*
; CHECK-NEXT: [[TMP12:%.*]] = load <3 x i32>, <3 x i32>* [[TMP11]], align 4
; CHECK-NEXT: [[TMP13:%.*]] = shufflevector <3 x i32> [[TMP4]], <3 x i32> [[TMP8]], <6 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>
; CHECK-NEXT: [[TMP14:%.*]] = shufflevector <3 x i32> [[TMP12]], <3 x i32> undef, <6 x i32> <i32 0, i32 1, i32 2, i32 undef, i32 undef, i32 undef>
; CHECK-NEXT: [[TMP15:%.*]] = shufflevector <6 x i32> [[TMP13]], <6 x i32> [[TMP14]], <9 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
; CHECK-NEXT: ret <9 x i32> [[TMP15]]
;
entry:
%load = call <9 x i32> @llvm.matrix.columnwise.load(<9 x i32>* %in, i32 %stride, i32 3, i32 3)
ret <9 x i32> %load
}
declare <9 x i32> @llvm.matrix.columnwise.load(<9 x i32>*, i32, i32, i32)
define <9 x i32> @strided_load_9x1(<9 x i32>* %in, i32 %stride) {
; CHECK-LABEL: @strided_load_9x1(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <9 x i32>* [[IN:%.*]] to i32*
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <9 x i32>*
; CHECK-NEXT: [[TMP4:%.*]] = load <9 x i32>, <9 x i32>* [[TMP3]], align 4
; CHECK-NEXT: ret <9 x i32> [[TMP4]]
;
entry:
%load = call <9 x i32> @llvm.matrix.columnwise.load(<9 x i32>* %in, i32 %stride, i32 9, i32 1)
ret <9 x i32> %load
}
declare <8 x i32> @llvm.matrix.columnwise.load.v8i32(<8 x i32>*, i32, i32, i32)
define <8 x i32> @strided_load_4x2(<8 x i32>* %in, i32 %stride) {
; CHECK-LABEL: @strided_load_4x2(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast <8 x i32>* [[IN:%.*]] to i32*
; CHECK-NEXT: [[TMP1:%.*]] = mul i32 0, [[STRIDE:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP1]]
; CHECK-NEXT: [[TMP3:%.*]] = bitcast i32* [[TMP2]] to <4 x i32>*
; CHECK-NEXT: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[TMP3]], align 4
; CHECK-NEXT: [[TMP5:%.*]] = mul i32 1, [[STRIDE]]
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i32, i32* [[TMP0]], i32 [[TMP5]]
; CHECK-NEXT: [[TMP7:%.*]] = bitcast i32* [[TMP6]] to <4 x i32>*
; CHECK-NEXT: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[TMP7]], align 4
; CHECK-NEXT: [[TMP9:%.*]] = shufflevector <4 x i32> [[TMP4]], <4 x i32> [[TMP8]], <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
; CHECK-NEXT: ret <8 x i32> [[TMP9]]
;
entry:
%load = call <8 x i32> @llvm.matrix.columnwise.load.v8i32(<8 x i32>* %in, i32 %stride, i32 4, i32 2)
ret <8 x i32> %load
}