float_args.mir
10.5 KB
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @float_in_fpr() {entry: ret void}
define void @double_in_fpr() {entry: ret void}
define void @float_in_gpr() {entry: ret void}
define void @double_in_gpr() {entry: ret void}
define void @call_float_in_fpr() {entry: ret void}
define void @call_double_in_fpr() {entry: ret void}
define void @call_float_in_gpr() {entry: ret void}
define void @call_double_in_gpr() {entry: ret void}
...
---
name: float_in_fpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: float_in_fpr
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
; FP32: $f0 = COPY [[COPY]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_in_fpr
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
; FP64: $f0 = COPY [[COPY]]
; FP64: RetRA implicit $f0
%1:fprb(s32) = COPY $f14
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: double_in_fpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: double_in_fpr
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d7
; FP32: $d0 = COPY [[COPY]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_in_fpr
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d7
; FP64: $d0 = COPY [[COPY]]
; FP64: RetRA implicit $d0
%1:fprb(s64) = COPY $d7
$d0 = COPY %1(s64)
RetRA implicit $d0
...
---
name: float_in_gpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: float_in_gpr
; FP32: liveins: $a0, $a1
; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
; FP32: $f0 = COPY [[MTC1_]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: float_in_gpr
; FP64: liveins: $a0, $a1
; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
; FP64: $f0 = COPY [[MTC1_]]
; FP64: RetRA implicit $f0
%1:fgr32(s32) = MTC1 $a1
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: double_in_gpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; FP32-LABEL: name: double_in_gpr
; FP32: liveins: $a0, $a2, $a3
; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
; FP32: $d0 = COPY [[BuildPairF64_]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: double_in_gpr
; FP64: liveins: $a0, $a2, $a3
; FP64: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
; FP64: $d0 = COPY [[BuildPairF64_]]
; FP64: RetRA implicit $d0
%1:afgr64(s64) = BuildPairF64 $a2, $a3
$d0 = COPY %1(s64)
RetRA implicit $d0
...
---
name: call_float_in_fpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12, $f14
; FP32-LABEL: name: call_float_in_fpr
; FP32: liveins: $f12, $f14
; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $f12 = COPY [[COPY]]
; FP32: $f14 = COPY [[COPY1]]
; FP32: JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
; FP32: [[COPY2:%[0-9]+]]:fgr32 = COPY $f0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $f0 = COPY [[COPY2]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: call_float_in_fpr
; FP64: liveins: $f12, $f14
; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f14
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $f12 = COPY [[COPY]]
; FP64: $f14 = COPY [[COPY1]]
; FP64: JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
; FP64: [[COPY2:%[0-9]+]]:fgr32 = COPY $f0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $f0 = COPY [[COPY2]]
; FP64: RetRA implicit $f0
%0:fprb(s32) = COPY $f12
%1:fprb(s32) = COPY $f14
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$f12 = COPY %0(s32)
$f14 = COPY %1(s32)
JAL @float_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit $f14, implicit-def $f0
%2:fprb(s32) = COPY $f0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: call_double_in_fpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6, $d7
; FP32-LABEL: name: call_double_in_fpr
; FP32: liveins: $d6, $d7
; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $d6 = COPY [[COPY]]
; FP32: $d7 = COPY [[COPY1]]
; FP32: JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
; FP32: [[COPY2:%[0-9]+]]:afgr64 = COPY $d0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $d0 = COPY [[COPY2]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: call_double_in_fpr
; FP64: liveins: $d6, $d7
; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $d6 = COPY [[COPY]]
; FP64: $d7 = COPY [[COPY1]]
; FP64: JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
; FP64: [[COPY2:%[0-9]+]]:fgr64 = COPY $d0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $d0 = COPY [[COPY2]]
; FP64: RetRA implicit $d0
%0:fprb(s64) = COPY $d6
%1:fprb(s64) = COPY $d7
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$d6 = COPY %0(s64)
$d7 = COPY %1(s64)
JAL @double_in_fpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit $d7, implicit-def $d0
%2:fprb(s64) = COPY $d0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$d0 = COPY %2(s64)
RetRA implicit $d0
...
---
name: call_float_in_gpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a1
; FP32-LABEL: name: call_float_in_gpr
; FP32: liveins: $a0, $a1
; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; FP32: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]]
; FP32: $a1 = MFC1 [[MTC1_]]
; FP32: JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
; FP32: [[COPY1:%[0-9]+]]:fgr32 = COPY $f0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $f0 = COPY [[COPY1]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: call_float_in_gpr
; FP64: liveins: $a0, $a1
; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; FP64: [[MTC1_:%[0-9]+]]:fgr32 = MTC1 $a1
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]]
; FP64: $a1 = MFC1 [[MTC1_]]
; FP64: JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
; FP64: [[COPY1:%[0-9]+]]:fgr32 = COPY $f0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $f0 = COPY [[COPY1]]
; FP64: RetRA implicit $f0
%0:gprb(s32) = COPY $a0
%1:fgr32(s32) = MTC1 $a1
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$a0 = COPY %0(s32)
$a1 = MFC1 %1(s32)
JAL @float_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $f0
%2:fprb(s32) = COPY $f0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$f0 = COPY %2(s32)
RetRA implicit $f0
...
---
name: call_double_in_gpr
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $a0, $a2, $a3
; FP32-LABEL: name: call_double_in_gpr
; FP32: liveins: $a0, $a2, $a3
; FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; FP32: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP32: $a0 = COPY [[COPY]]
; FP32: $a3 = ExtractElementF64 [[BuildPairF64_]], 1
; FP32: $a2 = ExtractElementF64 [[BuildPairF64_]], 0
; FP32: JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
; FP32: [[COPY1:%[0-9]+]]:afgr64 = COPY $d0
; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP32: $d0 = COPY [[COPY1]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: call_double_in_gpr
; FP64: liveins: $a0, $a2, $a3
; FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a0
; FP64: [[BuildPairF64_:%[0-9]+]]:afgr64 = BuildPairF64 $a2, $a3
; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
; FP64: $a0 = COPY [[COPY]]
; FP64: $a3 = ExtractElementF64 [[BuildPairF64_]], 1
; FP64: $a2 = ExtractElementF64 [[BuildPairF64_]], 0
; FP64: JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
; FP64: [[COPY1:%[0-9]+]]:fgr64 = COPY $d0
; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
; FP64: $d0 = COPY [[COPY1]]
; FP64: RetRA implicit $d0
%0:gprb(s32) = COPY $a0
%1:afgr64(s64) = BuildPairF64 $a2, $a3
ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
$a0 = COPY %0(s32)
$a3 = ExtractElementF64 %1(s64), 1
$a2 = ExtractElementF64 %1(s64), 0
JAL @double_in_gpr, csr_o32, implicit-def $ra, implicit-def $sp, implicit $a0, implicit-def $d0
%2:fprb(s64) = COPY $d0
ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
$d0 = COPY %2(s64)
RetRA implicit $d0
...