fabs.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
--- |
define void @fabs_f32() {entry: ret void}
define void @fabs_f64() {entry: ret void}
...
---
name: fabs_f32
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $f12
; FP32-LABEL: name: fabs_f32
; FP32: liveins: $f12
; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP32: [[FABS_S:%[0-9]+]]:fgr32 = FABS_S [[COPY]]
; FP32: $f0 = COPY [[FABS_S]]
; FP32: RetRA implicit $f0
; FP64-LABEL: name: fabs_f32
; FP64: liveins: $f12
; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f12
; FP64: [[FABS_S:%[0-9]+]]:fgr32 = FABS_S [[COPY]]
; FP64: $f0 = COPY [[FABS_S]]
; FP64: RetRA implicit $f0
%0:fprb(s32) = COPY $f12
%1:fprb(s32) = G_FABS %0
$f0 = COPY %1(s32)
RetRA implicit $f0
...
---
name: fabs_f64
alignment: 4
legalized: true
regBankSelected: true
tracksRegLiveness: true
body: |
bb.1.entry:
liveins: $d6
; FP32-LABEL: name: fabs_f64
; FP32: liveins: $d6
; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6
; FP32: [[FABS_D32_:%[0-9]+]]:afgr64 = FABS_D32 [[COPY]]
; FP32: $d0 = COPY [[FABS_D32_]]
; FP32: RetRA implicit $d0
; FP64-LABEL: name: fabs_f64
; FP64: liveins: $d6
; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d6
; FP64: [[FABS_D64_:%[0-9]+]]:fgr64 = FABS_D64 [[COPY]]
; FP64: $d0 = COPY [[FABS_D64_]]
; FP64: RetRA implicit $d0
%0:fprb(s64) = COPY $d6
%1:fprb(s64) = G_FABS %0
$d0 = COPY %1(s64)
RetRA implicit $d0
...