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# RUN: llc -march=amdgcn -verify-machineinstrs -run-pass si-wqm -o -  %s | FileCheck %s

---
# Check for awareness that s_or_saveexec_b64 clobbers SCC
#
#CHECK: ENTER_WWM
#CHECK: S_CMP_LT_I32
#CHECK: S_CSELECT_B32
name:            test_wwm_scc
alignment:       1
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
tracksRegLiveness: true
registers:       
  - { id: 0, class: sgpr_32, preferred-register: '' }
  - { id: 1, class: sgpr_32, preferred-register: '' }
  - { id: 2, class: sgpr_32, preferred-register: '' }
  - { id: 3, class: vgpr_32, preferred-register: '' }
  - { id: 4, class: vgpr_32, preferred-register: '' }
  - { id: 5, class: sgpr_32, preferred-register: '' }
  - { id: 6, class: vgpr_32, preferred-register: '' }
  - { id: 7, class: vgpr_32, preferred-register: '' }
  - { id: 8, class: sreg_32_xm0, preferred-register: '' }
  - { id: 9, class: sreg_32, preferred-register: '' }
  - { id: 10, class: sreg_32, preferred-register: '' }
  - { id: 11, class: vgpr_32, preferred-register: '' }
  - { id: 12, class: vgpr_32, preferred-register: '' }
liveins:         
  - { reg: '$sgpr0', virtual-reg: '%0' }
  - { reg: '$sgpr1', virtual-reg: '%1' }
  - { reg: '$sgpr2', virtual-reg: '%2' }
  - { reg: '$vgpr0', virtual-reg: '%3' }
body:             |
  bb.0:
    liveins: $sgpr0, $sgpr1, $sgpr2, $vgpr0
  
    %3 = COPY $vgpr0
    %2 = COPY $sgpr2
    %1 = COPY $sgpr1
    %0 = COPY $sgpr0
    S_CMP_LT_I32 0, %0, implicit-def $scc
    %12 = V_ADD_I32_e32 %3, %3, implicit-def $vcc, implicit $exec
    %5 = S_CSELECT_B32 %2, %1, implicit $scc
    %11 = V_ADD_I32_e32 %5, %12, implicit-def $vcc, implicit $exec
    $vgpr0 = WWM %11, implicit $exec
    SI_RETURN_TO_EPILOG $vgpr0

...

---
# V_SET_INACTIVE, when its second operand is undef, is replaced by a
# COPY by si-wqm. Ensure the instruction is removed.
#CHECK-NOT: V_SET_INACTIVE
name:            no_cfg
alignment:       1
exposesReturnsTwice: false
legalized:       false
regBankSelected: false
selected:        false
failedISel:      false
tracksRegLiveness: true
hasWinCFI:       false
registers:
  - { id: 0, class: sgpr_32, preferred-register: '' }
  - { id: 1, class: sgpr_32, preferred-register: '' }
  - { id: 2, class: sgpr_32, preferred-register: '' }
  - { id: 3, class: sgpr_32, preferred-register: '' }
  - { id: 4, class: sgpr_32, preferred-register: '' }
  - { id: 5, class: sgpr_128, preferred-register: '' }
  - { id: 6, class: sgpr_128, preferred-register: '' }
  - { id: 7, class: sreg_32, preferred-register: '' }
  - { id: 8, class: vreg_64, preferred-register: '' }
  - { id: 9, class: sreg_32, preferred-register: '' }
  - { id: 10, class: vgpr_32, preferred-register: '' }
  - { id: 11, class: vgpr_32, preferred-register: '' }
  - { id: 12, class: sreg_32, preferred-register: '' }
  - { id: 13, class: vgpr_32, preferred-register: '' }
  - { id: 14, class: vgpr_32, preferred-register: '' }
  - { id: 15, class: vgpr_32, preferred-register: '' }
  - { id: 16, class: vgpr_32, preferred-register: '' }
liveins:
  - { reg: '$sgpr0', virtual-reg: '%0' }
  - { reg: '$sgpr1', virtual-reg: '%1' }
  - { reg: '$sgpr2', virtual-reg: '%2' }
  - { reg: '$sgpr3', virtual-reg: '%3' }
body:             |
  bb.0:
    liveins: $sgpr0, $sgpr1, $sgpr2, $sgpr3

    %3:sgpr_32 = COPY $sgpr3
    %2:sgpr_32 = COPY $sgpr2
    %1:sgpr_32 = COPY $sgpr1
    %0:sgpr_32 = COPY $sgpr0
    %6:sgpr_128 = REG_SEQUENCE %0, %subreg.sub0, %1, %subreg.sub1, %2, %subreg.sub2, %3, %subreg.sub3
    %5:sgpr_128 = COPY %6
    %7:sreg_32 = S_MOV_B32 0
    %8:vreg_64 = BUFFER_LOAD_DWORDX2_OFFSET %6, %7, 0, 0, 0, 0, 0, 0, implicit $exec
    %16:vgpr_32 = COPY %8.sub1
    %11:vgpr_32 = COPY %16
    %10:vgpr_32 = V_SET_INACTIVE_B32 %11, undef %12:sreg_32, implicit $exec
    %14:vgpr_32 = COPY %7
    %13:vgpr_32 = V_MOV_B32_dpp %14, killed %10, 323, 12, 15, 0, implicit $exec
    early-clobber %15:vgpr_32 = WWM killed %13, implicit $exec
    BUFFER_STORE_DWORD_OFFSET_exact killed %15, %6, %7, 4, 0, 0, 0, 0, 0, implicit $exec
    S_ENDPGM 0

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