f128-compare.ll
6.09 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
; RUN: -enable-ppc-quad-precision -verify-machineinstrs \
; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | FileCheck %s
@a_qp = common global fp128 0xL00000000000000000000000000000000, align 16
@b_qp = common global fp128 0xL00000000000000000000000000000000, align 16
; Function Attrs: noinline nounwind optnone
define signext i32 @greater_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ogt fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: greater_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, gt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @less_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp olt fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: less_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @greater_eq_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp oge fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: greater_eq_qp
; CHECK: xscmpuqp
; CHECK: cror 4*cr[[REG:[0-9]+]]+lt, un, lt
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @less_eq_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ole fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: less_eq_qp
; CHECK: xscmpuqp
; CHECK: cror 4*cr[[REG:[0-9]+]]+lt, un, gt
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @equal_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp oeq fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: equal_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, r{{[0-9]+}}, r{{[0-9]+}}, eq
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @not_greater_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ogt fp128 %0, %1
%lnot = xor i1 %cmp, true
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
; CHECK-LABEL: not_greater_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, gt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @not_less_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp olt fp128 %0, %1
%lnot = xor i1 %cmp, true
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
; CHECK-LABEL: not_less_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @not_greater_eq_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp oge fp128 %0, %1
%lnot = xor i1 %cmp, true
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
; CHECK-LABEL: not_greater_eq_qp
; CHECK: xscmpuqp
; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, lt, un
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @not_less_eq_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ole fp128 %0, %1
%lnot = xor i1 %cmp, true
%lnot.ext = zext i1 %lnot to i32
ret i32 %lnot.ext
; CHECK-LABEL: not_less_eq_qp
; CHECK: xscmpuqp
; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, gt, un
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, 4*cr[[REG]]+lt
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define signext i32 @not_equal_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp une fp128 %0, %1
%conv = zext i1 %cmp to i32
ret i32 %conv
; CHECK-LABEL: not_equal_qp
; CHECK: xscmpuqp
; CHECK: isel r{{[0-9]+}}, 0, r{{[0-9]+}}, eq
; CHECK: blr
}
; Function Attrs: norecurse nounwind readonly
define fp128 @greater_sel_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ogt fp128 %0, %1
%cond = select i1 %cmp, fp128 %0, fp128 %1
ret fp128 %cond
; CHECK-LABEL: greater_sel_qp
; CHECK: xscmpuqp cr[[REG:[0-9]+]]
; CHECK: bgtlr cr[[REG]]
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define fp128 @less_sel_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp olt fp128 %0, %1
%cond = select i1 %cmp, fp128 %0, fp128 %1
ret fp128 %cond
; CHECK-LABEL: less_sel_qp
; CHECK: xscmpuqp cr[[REG:[0-9]+]]
; CHECK: bltlr cr[[REG]]
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define fp128 @greater_eq_sel_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp oge fp128 %0, %1
%cond = select i1 %cmp, fp128 %0, fp128 %1
ret fp128 %cond
; CHECK-LABEL: greater_eq_sel_qp
; CHECK: xscmpuqp
; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, un, lt
; CHECK: bclr {{[0-9]+}}, 4*cr[[REG]]+lt, 0
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define fp128 @less_eq_sel_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp ole fp128 %0, %1
%cond = select i1 %cmp, fp128 %0, fp128 %1
ret fp128 %cond
; CHECK-LABEL: less_eq_sel_qp
; CHECK: xscmpuqp
; CHECK: crnor 4*cr[[REG:[0-9]+]]+lt, un, gt
; CHECK: bclr {{[0-9]+}}, 4*cr[[REG]]+lt, 0
; CHECK: blr
}
; Function Attrs: noinline nounwind optnone
define fp128 @equal_sel_qp() {
entry:
%0 = load fp128, fp128* @a_qp, align 16
%1 = load fp128, fp128* @b_qp, align 16
%cmp = fcmp oeq fp128 %0, %1
%cond = select i1 %cmp, fp128 %0, fp128 %1
ret fp128 %cond
; CHECK-LABEL: equal_sel_qp
; CHECK: xscmpuqp cr[[REG:[0-9]+]]
; CHECK: beqlr cr[[REG]]
; CHECK: blr
}