rdf-copy-undef.ll
5.35 KB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
; RUN: llc -march=hexagon < %s
; REQUIRES: asserts
; After a copy R20 = R29, RDF copy propagation attempted to replace R20 with
; R29. R29 did not have a reaching def at that point (which isn't unusual),
; but copy propagation tried to link the new use of R29 to the presumed
; reaching def (which was null), causing a crash.
target triple = "hexagon"
@g0 = external unnamed_addr global i1, align 4
; Function Attrs: nounwind
declare i8* @llvm.stacksave() #0
; Function Attrs: nounwind
declare void @llvm.stackrestore(i8*) #0
; Function Attrs: norecurse nounwind
declare fastcc void @f0(i16 signext, i16 signext, i16 signext, i16* nocapture readonly, i16 signext, i16* nocapture) unnamed_addr #1
; Function Attrs: norecurse nounwind
declare fastcc signext i16 @f1(i16 signext, i16 signext) unnamed_addr #1
; Function Attrs: norecurse nounwind
define fastcc i32 @f2(i16* nocapture readonly %a0, i16 signext %a1, i16 signext %a2, i16* nocapture readonly %a3, i16 signext %a4, i16* nocapture readonly %a51, i16* nocapture %a6) unnamed_addr #1 {
b0:
%v0 = tail call i8* @llvm.stacksave()
%v1 = tail call fastcc signext i16 @f1(i16 signext %a2, i16 signext %a1)
br i1 undef, label %b7, label %b1
b1: ; preds = %b0
br i1 undef, label %b3, label %b2
b2: ; preds = %b1
br i1 undef, label %b4, label %b8
b3: ; preds = %b1
br i1 undef, label %b5, label %b8
b4: ; preds = %b4, %b2
br i1 undef, label %b4, label %b6, !llvm.loop !2
b5: ; preds = %b5, %b3
%v2 = phi i16 [ %v3, %b5 ], [ 0, %b3 ]
%v3 = add i16 %v2, 1
%v4 = icmp sgt i32 0, -1073741825
br i1 %v4, label %b5, label %b6
b6: ; preds = %b5, %b4
%v5 = phi i16 [ %v3, %b5 ], [ undef, %b4 ]
br label %b7
b7: ; preds = %b6, %b0
%v6 = phi i16 [ %v5, %b6 ], [ 0, %b0 ]
br i1 undef, label %b9, label %b8
b8: ; preds = %b7, %b3, %b2
%v7 = or i32 0, undef
br label %b9
b9: ; preds = %b8, %b7
%v8 = phi i16 [ 0, %b8 ], [ %v6, %b7 ]
%v9 = phi i32 [ %v7, %b8 ], [ 0, %b7 ]
%v10 = load i16, i16* undef, align 2, !tbaa !4
%v11 = sext i16 %v10 to i32
%v12 = zext i16 %v10 to i32
br i1 undef, label %b10, label %b11
b10: ; preds = %b9
store i1 true, i1* @g0, align 4
br label %b11
b11: ; preds = %b10, %b9
%v13 = load i16, i16* undef, align 2, !tbaa !4
%v14 = sext i16 %v13 to i32
%v15 = shl nuw i32 %v12, 16
%v16 = and i32 %v9, 65535
%v17 = mul nsw i32 %v11, %v16
%v18 = sitofp i32 %v15 to double
%v19 = fsub double %v18, undef
%v20 = sub nsw i32 %v15, %v17
%v21 = fptosi double %v19 to i32
%v22 = select i1 undef, i32 %v21, i32 %v20
%v23 = mul nsw i32 %v14, %v16
%v24 = add nsw i32 %v23, %v22
%v25 = add nsw i32 %v24, 32768
%v26 = lshr i32 %v25, 16
%v27 = xor i1 undef, true
%v28 = and i1 %v27, undef
br i1 %v28, label %b12, label %b13
b12: ; preds = %b11
store i1 true, i1* @g0, align 4
br label %b13
b13: ; preds = %b12, %b11
br i1 undef, label %b14, label %b24
b14: ; preds = %b13
br label %b15
b15: ; preds = %b23, %b14
br i1 undef, label %b16, label %b17
b16: ; preds = %b15
br label %b19
b17: ; preds = %b15
%v29 = trunc i32 %v26 to i16
%v30 = icmp eq i16 %v29, -32768
%v31 = and i1 undef, %v30
br i1 %v31, label %b18, label %b19
b18: ; preds = %b17
store i1 true, i1* @g0, align 4
br label %b20
b19: ; preds = %b17, %b16
br label %b20
b20: ; preds = %b19, %b18
%v32 = phi i32 [ 2147483647, %b18 ], [ 0, %b19 ]
%v33 = icmp eq i16 %v8, 32767
br i1 %v33, label %b21, label %b22
b21: ; preds = %b20
store i1 true, i1* @g0, align 4
br label %b23
b22: ; preds = %b20
br label %b23
b23: ; preds = %b22, %b21
%v34 = add nsw i32 %v32, 32768
%v35 = lshr i32 %v34, 16
%v36 = trunc i32 %v35 to i16
store i16 %v36, i16* undef, align 2, !tbaa !4
br i1 undef, label %b24, label %b15
b24: ; preds = %b23, %b13
call fastcc void @f0(i16 signext undef, i16 signext %a1, i16 signext %a2, i16* %a3, i16 signext %a4, i16* %a6)
call void @llvm.stackrestore(i8* %v0)
ret i32 undef
}
attributes #0 = { nounwind }
attributes #1 = { norecurse nounwind "target-cpu"="hexagonv60" "target-features"="+hvx,+hvx-length64b" }
!llvm.module.flags = !{!0}
!0 = !{i32 6, !"Target Features", !1}
!1 = !{!"+hvx,+hvx-length64b"}
!2 = distinct !{!2, !3}
!3 = !{!"llvm.loop.threadify", i32 43789156}
!4 = !{!5, !5, i64 0}
!5 = !{!"short", !6, i64 0}
!6 = !{!"omnipotent char", !7, i64 0}
!7 = !{!"Simple C++ TBAA"}